#x000116C7 Zhejiang Hechuan Technology Co.,Ltd. 424DD9020000000000003600000028000000100000000E000000010018000000000000000000232E0000232E00000000000000000000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF6BB15ADFEEDBFCFDFB68B058D5E9D174B66470B4608DC3806BB15AE1EFDEFFFFFFF2F8F07BBA6D72B56359A847CAE3C47FBC7174B665A5D09B50A33D8AC17CA5D09BFFFFFFFFFFFF82BD7479B86AAAD3A1D3E8CE52A43FCAE3C49ACA8F81BD74B7D9AF59A847C4E0BEB3A283B5C29D72B563FCFEFCFFFFFFC6E1BF57A644C2DFBBEAF4E8F0F7EEBEDDB799C98E54A541F3F9F25EAA4DF6FAF5E2D7CCC2AA93A3CF9968AF5768AF57D3E8CE75B66661AC4F76B767A0CD9578B86A6EB35F7EBB6FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF Encoder HCFA-Encoder 424DD9020000000000003600000028000000100000000E000000010018000000000000000000232E0000232E00000000000000000000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF6BB15ADFEEDBFCFDFB68B058D5E9D174B66470B4608DC3806BB15AE1EFDEFFFFFFF2F8F07BBA6D72B56359A847CAE3C47FBC7174B665A5D09B50A33D8AC17CA5D09BFFFFFFFFFFFF82BD7479B86AAAD3A1D3E8CE52A43FCAE3C49ACA8F81BD74B7D9AF59A847C4E0BEB3A283B5C29D72B563FCFEFCFFFFFFC6E1BF57A644C2DFBBEAF4E8F0F7EEBEDDB799C98E54A541F3F9F25EAA4DF6FAF5E2D7CCC2AA93A3CF9968AF5768AF57D3E8CE75B66661AC4F76B767A0CD9578B86A6EB35F7EBB6FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF HCQX-HC02-D4 HCQX-HC02-D4-V0.00.02,2Ch,Counter,DIFF,Max Freq 4MHz 2000 9000 5000 200 100 2000 Encoder 5001 STRING(4) 32 STRING(12) 96 USINT 8 UDINT 32 UINT 16 ULINT 64 BOOL 1 DINT 32 DT1018 144 0 SubIndex 000 USINT 8 0 ro 1 Vendor ID UDINT 32 16 ro 2 Product Code UDINT 32 48 ro 3 Revision Number UDINT 32 80 ro 4 Serial number UDINT 32 112 ro DT10F1 64 0 SubIndex 000 USINT 8 0 ro 1 Local Error Reaction UDINT 32 16 rw 2 Sync Error Counter Limit UINT 16 48 rw DT1600 208 0 SubIndex 000 USINT 8 0 ro 1 SubIndex 001 UDINT 32 16 ro 2 SubIndex 002 UDINT 32 48 ro 3 SubIndex 003 UDINT 32 80 ro 4 SubIndex 004 UDINT 32 112 ro 5 SubIndex 005 UDINT 32 144 ro 6 SubIndex 006 UDINT 32 176 ro DT1601 208 0 SubIndex 000 USINT 8 0 ro 1 SubIndex 001 UDINT 32 16 ro 2 SubIndex 002 UDINT 32 48 ro 3 SubIndex 003 UDINT 32 80 ro 4 SubIndex 004 UDINT 32 112 ro 5 SubIndex 005 UDINT 32 144 ro 6 SubIndex 006 UDINT 32 176 ro DT1602 48 0 SubIndex 000 USINT 8 0 ro 1 SubIndex 001 UDINT 32 16 ro DT1603 432 0 SubIndex 000 USINT 8 0 ro 1 SubIndex 001 UDINT 32 16 ro 2 SubIndex 002 UDINT 32 48 ro 3 SubIndex 003 UDINT 32 80 ro 4 SubIndex 004 UDINT 32 112 ro 5 SubIndex 005 UDINT 32 144 ro 6 SubIndex 006 UDINT 32 176 ro 7 SubIndex 007 UDINT 32 208 ro 8 SubIndex 008 UDINT 32 240 ro 9 SubIndex 009 UDINT 32 272 ro 10 SubIndex 010 UDINT 32 304 ro 11 SubIndex 011 UDINT 32 336 ro 12 SubIndex 012 UDINT 32 368 ro 13 SubIndex 013 UDINT 32 400 ro DT1604 432 0 SubIndex 000 USINT 8 0 ro 1 SubIndex 001 UDINT 32 16 ro 2 SubIndex 002 UDINT 32 48 ro 3 SubIndex 003 UDINT 32 80 ro 4 SubIndex 004 UDINT 32 112 ro 5 SubIndex 005 UDINT 32 144 ro 6 SubIndex 006 UDINT 32 176 ro 7 SubIndex 007 UDINT 32 208 ro 8 SubIndex 008 UDINT 32 240 ro 9 SubIndex 009 UDINT 32 272 ro 10 SubIndex 010 UDINT 32 304 ro 11 SubIndex 011 UDINT 32 336 ro 12 SubIndex 012 UDINT 32 368 ro 13 SubIndex 013 UDINT 32 400 ro DT1A00 336 0 SubIndex 000 USINT 8 0 ro 1 SubIndex 001 UDINT 32 16 ro 2 SubIndex 002 UDINT 32 48 ro 3 SubIndex 003 UDINT 32 80 ro 4 SubIndex 004 UDINT 32 112 ro 5 SubIndex 005 UDINT 32 144 ro 6 SubIndex 006 UDINT 32 176 ro 7 SubIndex 007 UDINT 32 208 ro 8 SubIndex 008 UDINT 32 240 ro 9 SubIndex 009 UDINT 32 272 ro 10 SubIndex 00A UDINT 32 304 ro DT1A01 336 0 SubIndex 000 USINT 8 0 ro 1 SubIndex 001 UDINT 32 16 ro 2 SubIndex 002 UDINT 32 48 ro 3 SubIndex 003 UDINT 32 80 ro 4 SubIndex 004 UDINT 32 112 ro 5 SubIndex 005 UDINT 32 144 ro 6 SubIndex 006 UDINT 32 176 ro 7 SubIndex 007 UDINT 32 208 ro 8 SubIndex 008 UDINT 32 240 ro 9 SubIndex 009 UDINT 32 272 ro 10 SubIndex 00a UDINT 32 304 ro DT1A02 144 0 SubIndex 000 USINT 8 0 ro 1 SubIndex 001 UDINT 32 16 ro 2 SubIndex 002 UDINT 32 48 ro 3 SubIndex 003 UDINT 32 80 ro 4 SubIndex 004 UDINT 32 112 ro DT1C00ARR USINT 32 1 4 DT1C00 48 0 SubIndex 000 USINT 8 0 ro Elements DT1C00ARR 32 16 ro DT1C12ARR UINT 80 1 5 DT1C12 96 0 SubIndex 000 USINT 8 0 ro Elements DT1C12ARR 80 16 ro DT1C13ARR UINT 48 1 3 DT1C13 64 0 SubIndex 000 USINT 8 0 ro Elements DT1C13ARR 48 16 ro DT1C32 488 0 SubIndex 000 USINT 8 0 ro 1 Synchronization Type UINT 16 16 rw 2 Cycle Time UDINT 32 32 ro 4 Synchronization Types supported UINT 16 96 ro 5 Minimum Cycle Time UDINT 32 112 ro 6 Calc and Copy Time UDINT 32 144 ro 8 Get Cycle Time UINT 16 208 rw 9 Delay Time UDINT 32 224 ro 10 Sync0 Cycle Time UDINT 32 256 rw 11 SM-Event Missed UINT 16 288 ro 12 Cycle Time Too Small UINT 16 304 ro 13 Shift Time Too Short Counter UINT 16 320 ro 32 Sync Error BOOL 1 480 ro DT1C33 488 0 SubIndex 000 USINT 8 0 ro 1 Synchronization Type UINT 16 16 rw 2 Cycle Time UDINT 32 32 ro 4 Synchronization Types supported UINT 16 96 ro 5 Minimum Cycle Time UDINT 32 112 ro 6 Calc and Copy Time UDINT 32 144 ro 8 Get Cycle Time UINT 16 208 rw 9 Delay Time UDINT 32 224 ro 10 Sync0 Cycle Time UDINT 32 256 rw 11 SM-Event Missed UINT 16 288 ro 12 Cycle Time Too Small UINT 16 304 ro 13 Shift Time Too Short Counter UINT 16 320 ro 32 Sync Error BOOL 1 480 ro DT8000 32 0 SubIndex 000 USINT 8 0 ro 1 Logic Choice I01 BOOL 1 16 rw 1 2 Logic Choice I02 BOOL 1 17 rw 1 3 Logic Choice I03 BOOL 1 18 rw 1 4 Logic Choice I11 BOOL 1 19 rw 1 5 Logic Choice I12 BOOL 1 20 rw 1 6 Logic Choice I13 BOOL 1 21 rw 1 7 Count Type Ch1 BOOL 1 22 rw 1 8 Count Direction Ch1 BOOL 1 23 rw 1 9 Count Type Ch2 BOOL 1 24 rw 1 10 Count Direction Ch2 BOOL 1 25 rw 1 DT8001 112 0 SubIndex 000 USINT 8 0 ro 1 Function Choice I01 USINT 8 16 rw 1 2 Function Choice I02 USINT 8 24 rw 1 3 Function Choice I03 USINT 8 32 rw 1 4 Function Choice I11 USINT 8 40 rw 1 5 Function Choice I12 USINT 8 48 rw 1 6 Function Choice I13 USINT 8 56 rw 1 7 Function Choice Q01 USINT 8 64 rw 1 8 Function Choice Q02 USINT 8 72 rw 1 9 Function Choice Q03 USINT 8 80 rw 1 10 Function Choice Q11 USINT 8 88 rw 1 11 Function Choice Q12 USINT 8 96 rw 1 12 Function Choice Q13 USINT 8 104 rw 1 DT8002 80 0 SubIndex 000 USINT 8 0 ro 1 Max Count Value Ch1 DINT 32 16 rw 1 2 Max Count Value Ch2 DINT 32 48 rw 1 DT8003 80 0 SubIndex 000 USINT 8 0 ro 1 Min Count Value Ch1 DINT 32 16 rw 1 2 Min Count Value Ch2 DINT 32 48 rw 1 DT800A 48 0 SubIndex 000 USINT 8 0 ro 1 Window Ch1 UINT 16 16 rw 1 2 Window Ch2 UINT 16 32 rw 1 DT800B 48 0 SubIndex 000 USINT 8 0 ro 1 Average Times Ch1 UINT 16 16 rw 1 2 Average Times Ch2 UINT 16 32 rw 1 DT800C 32 0 SubIndex 000 USINT 8 0 ro 1 Pulse Input Mode Ch1 USINT 8 16 rw 1 2 Pulse Input Mode Ch2 USINT 8 24 rw 1 DT800D 144 0 SubIndex 000 USINT 8 0 ro 1 Pluse Input Filter Ch1 UINT 16 16 rw 1 2 Pluse Input Filter Ch2 UINT 16 32 rw 1 3 Filter I01 UINT 16 48 rw 1 4 Filter I02 UINT 16 64 rw 1 5 Filter I03 UINT 16 80 rw 1 6 Filter I11 UINT 16 96 rw 1 7 Filter I12 UINT 16 112 rw 1 8 Filter I13 UINT 16 128 rw 1 DT800E 64 0 SubIndex 000 USINT 8 0 ro 1 Abnormal Mode Q01 USINT 8 16 rw 1 2 Abnormal Mode Q02 USINT 8 24 rw 1 3 Abnormal Mode Q03 USINT 8 32 rw 1 4 Abnormal Mode Q11 USINT 8 40 rw 1 5 Abnormal Mode Q12 USINT 8 48 rw 1 6 Abnormal Mode Q13 USINT 8 56 rw 1 DT801A 208 0 SubIndex 000 USINT 8 0 ro 1 Comparison value of Q01 DINT 32 16 rw 1 2 Comparison value of Q02 DINT 32 48 rw 1 3 Comparison value of Q03 DINT 32 80 rw 1 4 Comparison value of Q11 DINT 32 112 rw 1 5 Comparison value of Q12 DINT 32 144 rw 1 6 Comparison value of Q13 DINT 32 176 rw 1 DT801B 112 0 SubIndex 000 USINT 8 0 ro 1 Timer of Q01 UINT 16 16 rw 1 2 Timer of Q02 UINT 16 32 rw 1 3 Timer of Q03 UINT 16 48 rw 1 4 Timer of Q11 UINT 16 64 rw 1 5 Timer of Q12 UINT 16 80 rw 1 6 Timer of Q13 UINT 16 96 rw 1 DT801C 112 0 SubIndex 000 USINT 8 0 ro 1 Delay of Q01 UINT 16 16 rw 1 2 Delay of Q02 UINT 16 32 rw 1 3 Delay of Q03 UINT 16 48 rw 1 4 Delay of Q11 UINT 16 64 rw 1 5 Delay of Q12 UINT 16 80 rw 1 6 Delay of Q13 UINT 16 96 rw 1 DT801D 64 0 SubIndex 000 USINT 8 0 ro 1 Backward of Q01 USINT 8 16 rw 1 2 Backward of Q02 USINT 8 24 rw 1 3 Backward of Q03 USINT 8 32 rw 1 4 Backward of Q11 USINT 8 40 rw 1 5 Backward of Q12 USINT 8 48 rw 1 6 Backward of Q13 USINT 8 56 rw 1 DT8020 80 0 SubIndex 000 USINT 8 0 ro 1 Range Compare Enable of Ch1 UDINT 32 16 rw 1 2 Range Compare Enable of Ch2 UDINT 32 48 rw 1 DT8021 88 0 SubIndex 000 USINT 8 0 ro 1 Upper limit of Ch1 Rang1 DINT 32 16 rw 1 2 Lower limit of Ch1 Rang1 DINT 32 48 rw 1 3 Output Mode of Ch1 Rang1 USINT 8 80 rw 1 DT8022 88 0 SubIndex 000 USINT 8 0 ro 1 Upper limit of Ch1 Rang2 DINT 32 16 rw 1 2 Lower limit of Ch1 Rang2 DINT 32 48 rw 1 3 Output Mode of Ch1 Rang2 USINT 8 80 rw 1 DT8023 88 0 SubIndex 000 USINT 8 0 ro 1 Upper limit of Ch1 Rang3 DINT 32 16 rw 1 2 Lower limit of Ch1 Rang3 DINT 32 48 rw 1 3 Output Mode of Ch1 Rang3 USINT 8 80 rw 1 DT8024 88 0 SubIndex 000 USINT 8 0 ro 1 Upper limit of Ch1 Rang4 DINT 32 16 rw 1 2 Lower limit of Ch1 Rang4 DINT 32 48 rw 1 3 Output Mode of Ch1 Rang4 USINT 8 80 rw 1 DT8025 88 0 SubIndex 000 USINT 8 0 ro 1 Upper limit of Ch1 Rang5 DINT 32 16 rw 1 2 Lower limit of Ch1 Rang5 DINT 32 48 rw 1 3 Output Mode of Ch1 Rang5 USINT 8 80 rw 1 DT8026 88 0 SubIndex 000 USINT 8 0 ro 1 Upper limit of Ch1 Rang6 DINT 32 16 rw 1 2 Lower limit of Ch1 Rang6 DINT 32 48 rw 1 3 Output Mode of Ch1 Rang6 USINT 8 80 rw 1 DT8027 88 0 SubIndex 000 USINT 8 0 ro 1 Upper limit of Ch1 Rang7 DINT 32 16 rw 1 2 Lower limit of Ch1 Rang7 DINT 32 48 rw 1 3 Output Mode of Ch1 Rang7 USINT 8 80 rw 1 DT8028 88 0 SubIndex 000 USINT 8 0 ro 1 Upper limit of Ch1 Rang8 DINT 32 16 rw 1 2 Lower limit of Ch1 Rang8 DINT 32 48 rw 1 3 Output Mode of Ch1 Rang8 USINT 8 80 rw 1 DT8029 88 0 SubIndex 000 USINT 8 0 ro 1 Upper limit of Ch1 Rang9 DINT 32 16 rw 1 2 Lower limit of Ch1 Rang9 DINT 32 48 rw 1 3 Output Mode of Ch1 Rang9 USINT 8 80 rw 1 DT802A 88 0 SubIndex 000 USINT 8 0 ro 1 Upper limit of Ch1 Rang10 UDINT 32 16 rw 1 2 Lower limit of Ch1 Rang10 UDINT 32 48 rw 1 3 Output Mode of Ch1 Rang10 USINT 8 80 rw 1 DT802B 88 0 SubIndex 000 USINT 8 0 ro 1 Upper limit of Ch1 Rang11 DINT 32 16 rw 1 2 Lower limit of Ch1 Rang11 DINT 32 48 rw 1 3 Output Mode of Ch1 Rang11 USINT 8 80 rw 1 DT802C 88 0 SubIndex 000 USINT 8 0 ro 1 Upper limit of Ch1 Rang12 DINT 32 16 rw 1 2 Lower limit of Ch1 Rang12 DINT 32 48 rw 1 3 Output Mode of Ch1 Rang12 USINT 8 80 rw 1 DT802D 88 0 SubIndex 000 USINT 8 0 ro 1 Upper limit of Ch1 Rang13 DINT 32 16 rw 1 2 Lower limit of Ch1 Rang13 DINT 32 48 rw 1 3 Output Mode of Ch1 Rang13 USINT 8 80 rw 1 DT802E 88 0 SubIndex 000 USINT 8 0 ro 1 Upper limit of Ch1 Rang14 DINT 32 16 rw 1 2 Lower limit of Ch1 Rang14 DINT 32 48 rw 1 3 Output Mode of Ch1 Rang14 USINT 8 80 rw 1 DT802F 88 0 SubIndex 000 USINT 8 0 ro 1 Upper limit of Ch1 Rang15 DINT 32 16 rw 1 2 Lower limit of Ch1 Rang15 DINT 32 48 rw 1 3 Output Mode of Ch1 Rang15 USINT 8 80 rw 1 DT8030 88 0 SubIndex 000 USINT 8 0 ro 1 Upper limit of Ch1 Rang16 DINT 32 16 rw 1 2 Lower limit of Ch1 Rang16 DINT 32 48 rw 1 3 Output Mode of Ch1 Rang16 USINT 8 80 rw 1 DT8031 88 0 SubIndex 000 USINT 8 0 ro 1 Upper limit of Ch1 Rang17 DINT 32 16 rw 1 2 Lower limit of Ch1 Rang17 DINT 32 48 rw 1 3 Output Mode of Ch1 Rang17 USINT 8 80 rw 1 DT8032 88 0 SubIndex 000 USINT 8 0 ro 1 Upper limit of Ch1 Rang18 DINT 32 16 rw 1 2 Lower limit of Ch1 Rang18 DINT 32 48 rw 1 3 Output Mode of Ch1 Rang18 USINT 8 80 rw 1 DT8033 88 0 SubIndex 000 USINT 8 0 ro 1 Upper limit of Ch1 Rang19 DINT 32 16 rw 1 2 Lower limit of Ch1 Rang19 DINT 32 48 rw 1 3 Output Mode of Ch1 Rang19 USINT 8 80 rw 1 DT8034 88 0 SubIndex 000 USINT 8 0 ro 1 Upper limit of Ch1 Rang20 DINT 32 16 rw 1 2 Lower limit of Ch1 Rang20 DINT 32 48 rw 1 3 Output Mode of Ch1 Rang20 USINT 8 80 rw 1 DT8035 88 0 SubIndex 000 USINT 8 0 ro 1 Upper limit of Ch1 Rang21 DINT 32 16 rw 1 2 Lower limit of Ch1 Rang21 DINT 32 48 rw 1 3 Output Mode of Ch1 Rang21 USINT 8 80 rw 1 DT8036 88 0 SubIndex 000 USINT 8 0 ro 1 Upper limit of Ch1 Rang22 DINT 32 16 rw 1 2 Lower limit of Ch1 Rang22 DINT 32 48 rw 1 3 Output Mode of Ch1 Rang22 USINT 8 80 rw 1 DT8037 88 0 SubIndex 000 USINT 8 0 ro 1 Upper limit of Ch1 Rang23 DINT 32 16 rw 1 2 Lower limit of Ch1 Rang23 DINT 32 48 rw 1 3 Output Mode of Ch1 Rang23 USINT 8 80 rw 1 DT8038 88 0 SubIndex 000 USINT 8 0 ro 1 Upper limit of Ch1 Rang24 DINT 32 16 rw 1 2 Lower limit of Ch1 Rang24 DINT 32 48 rw 1 3 Output Mode of Ch1 Rang24 USINT 8 80 rw 1 DT8039 88 0 SubIndex 000 USINT 8 0 ro 1 Upper limit of Ch1 Rang25 DINT 32 16 rw 1 2 Lower limit of Ch1 Rang25 DINT 32 48 rw 1 3 Output Mode of Ch1 Rang25 USINT 8 80 rw 1 DT803A 88 0 SubIndex 000 USINT 8 0 ro 1 Upper limit of Ch1 Rang26 DINT 32 16 rw 1 2 Lower limit of Ch1 Rang26 DINT 32 48 rw 1 3 Output Mode of Ch1 Rang26 USINT 8 80 rw 1 DT803B 88 0 SubIndex 000 USINT 8 0 ro 1 Upper limit of Ch1 Rang27 DINT 32 16 rw 1 2 Lower limit of Ch1 Rang27 DINT 32 48 rw 1 3 Output Mode of Ch1 Rang27 USINT 8 80 rw 1 DT803C 88 0 SubIndex 000 USINT 8 0 ro 1 Upper limit of Ch1 Rang28 DINT 32 16 rw 1 2 Lower limit of Ch1 Rang28 DINT 32 48 rw 1 3 Output Mode of Ch1 Rang28 USINT 8 80 rw 1 DT803D 88 0 SubIndex 000 USINT 8 0 ro 1 Upper limit of Ch1 Rang29 DINT 32 16 rw 1 2 Lower limit of Ch1 Rang29 DINT 32 48 rw 1 3 Output Mode of Ch1 Rang29 USINT 8 80 rw 1 DT803E 88 0 SubIndex 000 USINT 8 0 ro 1 Upper limit of Ch1 Rang30 DINT 32 16 rw 1 2 Lower limit of Ch1 Rang30 DINT 32 48 rw 1 3 Output Mode of Ch1 Rang30 USINT 8 80 rw 1 DT803F 88 0 SubIndex 000 USINT 8 0 ro 1 Upper limit of Ch1 Rang31 DINT 32 16 rw 1 2 Lower limit of Ch1 Rang31 DINT 32 48 rw 1 3 Output Mode of Ch1 Rang31 USINT 8 80 rw 1 DT8040 88 0 SubIndex 000 USINT 8 0 ro 1 Upper limit of Ch2 Rang1 DINT 32 16 rw 1 2 Lower limit of Ch2 Rang1 DINT 32 48 rw 1 3 Output Mode of Ch2 Rang1 USINT 8 80 rw 1 DT8041 88 0 SubIndex 000 USINT 8 0 ro 1 Upper limit of Ch2 Rang2 DINT 32 16 rw 1 2 Lower limit of Ch2 Rang2 DINT 32 48 rw 1 3 Output Mode of Ch2 Rang2 USINT 8 80 rw 1 DT8042 88 0 SubIndex 000 USINT 8 0 ro 1 Upper limit of Ch2 Rang3 DINT 32 16 rw 1 2 Lower limit of Ch2 Rang3 DINT 32 48 rw 1 3 Output Mode of Ch2 Rang3 USINT 8 80 rw 1 DT8043 88 0 SubIndex 000 USINT 8 0 ro 1 Upper limit of Ch2 Rang4 DINT 32 16 rw 1 2 Lower limit of Ch2 Rang4 DINT 32 48 rw 1 3 Output Mode of Ch2 Rang4 USINT 8 80 rw 1 DT8044 88 0 SubIndex 000 USINT 8 0 ro 1 Upper limit of Ch2 Rang5 DINT 32 16 rw 1 2 Lower limit of Ch2 Rang5 DINT 32 48 rw 1 3 Output Mode of Ch2 Rang5 USINT 8 80 rw 1 DT8045 88 0 SubIndex 000 USINT 8 0 ro 1 Upper limit of Ch2 Rang6 DINT 32 16 rw 1 2 Lower limit of Ch2 Rang6 DINT 32 48 rw 1 3 Output Mode of Ch2 Rang6 USINT 8 80 rw 1 DT8046 88 0 SubIndex 000 USINT 8 0 ro 1 Upper limit of Ch2 Rang7 DINT 32 16 rw 1 2 Lower limit of Ch2 Rang7 DINT 32 48 rw 1 3 Output Mode of Ch2 Rang7 USINT 8 80 rw 1 DT8047 88 0 SubIndex 000 USINT 8 0 ro 1 Upper limit of Ch2 Rang8 DINT 32 16 rw 1 2 Lower limit of Ch2 Rang8 DINT 32 48 rw 1 3 Output Mode of Ch2 Rang8 USINT 8 80 rw 1 DT8048 88 0 SubIndex 000 USINT 8 0 ro 1 Upper limit of Ch2 Rang9 DINT 32 16 rw 1 2 Lower limit of Ch2 Rang9 DINT 32 48 rw 1 3 Output Mode of Ch2 Rang9 USINT 8 80 rw 1 DT8049 88 0 SubIndex 000 USINT 8 0 ro 1 Upper limit of Ch2 Rang10 DINT 32 16 rw 1 2 Lower limit of Ch2 Rang10 DINT 32 48 rw 1 3 Output Mode of Ch2 Rang10 USINT 8 80 rw 1 DT804A 88 0 SubIndex 000 USINT 8 0 ro 1 Upper limit of Ch2 Rang11 DINT 32 16 rw 1 2 Lower limit of Ch2 Rang11 DINT 32 48 rw 1 3 Output Mode of Ch2 Rang11 USINT 8 80 rw 1 DT804B 88 0 SubIndex 000 USINT 8 0 ro 1 Upper limit of Ch2 Rang12 DINT 32 16 rw 1 2 Lower limit of Ch2 Rang12 DINT 32 48 rw 1 3 Output Mode of Ch2 Rang12 USINT 8 80 rw 1 DT804C 88 0 SubIndex 000 USINT 8 0 ro 1 Upper limit of Ch2 Rang13 DINT 32 16 rw 1 2 Lower limit of Ch2 Rang13 DINT 32 48 rw 1 3 Output Mode of Ch2 Rang13 USINT 8 80 rw 1 DT804D 88 0 SubIndex 000 USINT 8 0 ro 1 Upper limit of Ch2 Rang14 DINT 32 16 rw 1 2 Lower limit of Ch2 Rang14 DINT 32 48 rw 1 3 Output Mode of Ch2 Rang14 USINT 8 80 rw 1 DT804E 88 0 SubIndex 000 USINT 8 0 ro 1 Upper limit of Ch2 Rang15 DINT 32 16 rw 1 2 Lower limit of Ch2 Rang15 DINT 32 48 rw 1 3 Output Mode of Ch2 Rang15 USINT 8 80 rw 1 DT804F 88 0 SubIndex 000 USINT 8 0 ro 1 Upper limit of Ch2 Rang16 DINT 32 16 rw 1 2 Lower limit of Ch2 Rang16 DINT 32 48 rw 1 3 Output Mode of Ch2 Rang16 USINT 8 80 rw 1 DT8050 88 0 SubIndex 000 USINT 8 0 ro 1 Upper limit of Ch2 Rang17 DINT 32 16 rw 1 2 Lower limit of Ch2 Rang17 DINT 32 48 rw 1 3 Output Mode of Ch2 Rang17 USINT 8 80 rw 1 DT8051 88 0 SubIndex 000 USINT 8 0 ro 1 Upper limit of Ch2 Rang18 DINT 32 16 rw 1 2 Lower limit of Ch2 Rang18 DINT 32 48 rw 1 3 Output Mode of Ch2 Rang18 USINT 8 80 rw 1 DT8052 88 0 SubIndex 000 USINT 8 0 ro 1 Upper limit of Ch2 Rang19 DINT 32 16 rw 1 2 Lower limit of Ch2 Rang19 DINT 32 48 rw 1 3 Output Mode of Ch2 Rang19 USINT 8 80 rw 1 DT8053 88 0 SubIndex 000 USINT 8 0 ro 1 Upper limit of Ch2 Rang20 DINT 32 16 rw 1 2 Lower limit of Ch2 Rang20 DINT 32 48 rw 1 3 Output Mode of Ch2 Rang20 USINT 8 80 rw 1 DT8054 88 0 SubIndex 000 USINT 8 0 ro 1 Upper limit of Ch2 Rang21 DINT 32 16 rw 1 2 Lower limit of Ch2 Rang21 DINT 32 48 rw 1 3 Output Mode of Ch2 Rang21 USINT 8 80 rw 1 DT8055 88 0 SubIndex 000 USINT 8 0 ro 1 Upper limit of Ch2 Rang22 DINT 32 16 rw 1 2 Lower limit of Ch2 Rang22 DINT 32 48 rw 1 3 Output Mode of Ch2 Rang22 USINT 8 80 rw 1 DT8056 88 0 SubIndex 000 USINT 8 0 ro 1 Upper limit of Ch2 Rang23 DINT 32 16 rw 1 2 Lower limit of Ch2 Rang23 DINT 32 48 rw 1 3 Output Mode of Ch2 Rang23 USINT 8 80 rw 1 DT8057 88 0 SubIndex 000 USINT 8 0 ro 1 Upper limit of Ch2 Rang24 DINT 32 16 rw 1 2 Lower limit of Ch2 Rang24 DINT 32 48 rw 1 3 Output Mode of Ch2 Rang24 USINT 8 80 rw 1 DT8058 88 0 SubIndex 000 USINT 8 0 ro 1 Upper limit of Ch2 Rang25 DINT 32 16 rw 1 2 Lower limit of Ch2 Rang25 DINT 32 48 rw 1 3 Output Mode of Ch2 Rang25 USINT 8 80 rw 1 DT8059 88 0 SubIndex 000 USINT 8 0 ro 1 Upper limit of Ch2 Rang26 DINT 32 16 rw 1 2 Lower limit of Ch2 Rang26 DINT 32 48 rw 1 3 Output Mode of Ch2 Rang26 USINT 8 80 rw 1 DT805A 88 0 SubIndex 000 USINT 8 0 ro 1 Upper limit of Ch2 Rang27 DINT 32 16 rw 1 2 Lower limit of Ch2 Rang27 DINT 32 48 rw 1 3 Output Mode of Ch2 Rang27 USINT 8 80 rw 1 DT805B 88 0 SubIndex 000 USINT 8 0 ro 1 Upper limit of Ch2 Rang28 DINT 32 16 rw 1 2 Lower limit of Ch2 Rang28 DINT 32 48 rw 1 3 Output Mode of Ch2 Rang28 USINT 8 80 rw 1 DT805C 88 0 SubIndex 000 USINT 8 0 ro 1 Upper limit of Ch2 Rang29 DINT 32 16 rw 1 2 Lower limit of Ch2 Rang29 DINT 32 48 rw 1 3 Output Mode of Ch2 Rang29 USINT 8 80 rw 1 DT805D 88 0 SubIndex 000 USINT 8 0 ro 1 Upper limit of Ch2 Rang30 DINT 32 16 rw 1 2 Lower limit of Ch2 Rang30 DINT 32 48 rw 1 3 Output Mode of Ch2 Rang30 USINT 8 80 rw 1 DT805E 88 0 SubIndex 000 USINT 8 0 ro 1 Upper limit of Ch2 Rang31 DINT 32 16 rw 1 2 Lower limit of Ch2 Rang31 DINT 32 48 rw 1 3 Output Mode of Ch2 Rang31 USINT 8 80 rw 1 #x1000 Device type UDINT 32 89130000 ro #x1001 Error register USINT 8 00 ro #x1008 Device name STRING(12) 96 484351582D484330322D4434 ro #x1009 Manufacturer Hardware version STRING(4) 32 312E3030 ro #x100A Manufacturer Software version STRING(4) 32 312E3030 ro #x1018 Identity Object DT1018 144 SubIndex 000 04 Vendor ID C7160100 Product Code 91EB0514 Revision Number 01000000 Serial number 00000000 #x10F1 Error Settings DT10F1 64 SubIndex 000 02 Local Error Reaction 01000000 Sync Error Counter Limit 0400 #x10F8 Timestamp Object ULINT 64 rw t #x1600 ENC CH1 Receive PDO Mapping DT1600 208 SubIndex 000 06 SubIndex 001 10000070 SubIndex 002 08000170 SubIndex 003 08000000 SubIndex 004 08000370 SubIndex 005 08000000 SubIndex 006 20000570 #x1601 ENC CH2 Receive PDO Mapping DT1601 208 SubIndex 000 06 SubIndex 001 10000670 SubIndex 002 08000770 SubIndex 003 08000000 SubIndex 004 08000970 SubIndex 005 08000000 SubIndex 006 20000B70 #x1602 ENC Receive PDO Mapping3 DT1602 48 SubIndex 000 01 SubIndex 001 10000C70 #x1603 ENC CH1 Receive PDO Mapping2 DT1603 432 SubIndex 000 0D SubIndex 001 20012080 SubIndex 002 20012180 SubIndex 003 20022180 SubIndex 004 20012280 SubIndex 005 20022280 SubIndex 006 20012380 SubIndex 007 20022380 SubIndex 008 20012480 SubIndex 009 20022480 SubIndex 010 20012580 SubIndex 011 20022580 SubIndex 012 20012680 SubIndex 013 20022680 #x1604 ENC CH2 Receive PDO Mapping2 DT1604 432 SubIndex 000 0D SubIndex 001 20022080 SubIndex 002 20014080 SubIndex 003 20024080 SubIndex 004 20014180 SubIndex 005 20024180 SubIndex 006 20014280 SubIndex 007 20024280 SubIndex 008 20014380 SubIndex 009 20024380 SubIndex 010 20014480 SubIndex 011 20024480 SubIndex 012 20014580 SubIndex 013 20024580 #x1A00 ENC CH1 Transmit PDO Mapping DT1A00 336 SubIndex 000 0A SubIndex 001 20000060 SubIndex 002 08000160 SubIndex 003 08000000 SubIndex 004 10000360 SubIndex 005 08000560 SubIndex 006 08000000 SubIndex 007 20000760 SubIndex 008 20000860 SubIndex 009 20000960 SubIndex 00A 20000A60 #x1A01 ENC CH2 Transmit PDO Mapping DT1A01 336 SubIndex 000 0A SubIndex 001 20000B60 SubIndex 002 08000C60 SubIndex 003 08000000 SubIndex 004 10000E60 SubIndex 005 08001060 SubIndex 006 08000000 SubIndex 007 20001260 SubIndex 008 20001360 SubIndex 009 20001460 SubIndex 00a 20001560 #x1A02 ENC Transmit PDO Mapping3 DT1A02 144 SubIndex 000 04 SubIndex 001 10002B60 SubIndex 002 10002C60 SubIndex 003 20002D60 SubIndex 004 20002E60 #x1C00 Sync manager type DT1C00 48 SubIndex 000 04 SubIndex 001 01 SubIndex 002 02 SubIndex 003 03 SubIndex 004 04 #x1C12 SyncManager 2 assignment DT1C12 96 SubIndex 000 05 SubIndex 001 0016 SubIndex 002 0116 SubIndex 003 0216 SubIndex 004 0316 SubIndex 005 0416 #x1C13 SyncManager 3 assignment DT1C13 64 SubIndex 000 03 SubIndex 001 001A SubIndex 002 011A SubIndex 003 021A #x1C32 SM output parameter DT1C32 488 SubIndex 000 20 Synchronization Type 0100 Synchronization Types supported 0780 Minimum Cycle Time 90D00300 #x1C33 SM input parameter DT1C33 488 SubIndex 000 20 Synchronization Type 2200 Synchronization Types supported 0780 Minimum Cycle Time 90D00300 #x6000 ENC Current Data Ch1 DINT 32 00000000 ro t #x6001 ENC Timer Status Ch1 USINT 8 00 ro t #x6003 ENC External Input Status Ch1 UINT 16 0000 ro t #x6005 ENC Period Status Ch1 USINT 8 00 ro t #x6007 ENC External Latch Data Ch1 DINT 32 00000000 ro t #x6008 ENC Software Latch Data Ch1 DINT 32 00000000 ro t #x6009 ENC Pulse Speed Ch1 DINT 32 00000000 ro t #x600A ENC Pulse Period Ch1 UDINT 32 00000000 ro t #x600B ENC Current Data Ch2 DINT 32 00000000 ro t #x600C ENC Timer Status Ch2 USINT 8 00 ro t #x600E ENC External Input Status Ch2 UINT 16 0000 ro t #x6010 ENC Period Status Ch2 USINT 8 00 ro t #x6012 ENC External Latch Data Ch2 DINT 32 00000000 ro t #x6013 ENC Software Latch Data Ch2 DINT 32 00000000 ro t #x6014 ENC Pulse Speed Ch2 DINT 32 00000000 ro t #x6015 ENC Pulse Period Ch2 UDINT 32 00000000 ro t #x602B ENC Error Status UINT 16 0000 ro t #x602C ENC Latch Status UINT 16 0000 ro t #x602D ENC Compare Output Status Ch1 UDINT 32 00000000 ro t #x602E ENC Compare Output Status Ch2 UDINT 32 00000000 ro t #x7000 ENC Operation Command Ch1 UINT 16 0000 ro r #x7001 ENC Period Calculation Ch1 USINT 8 00 ro r #x7003 ENC Latch Command Ch1 USINT 8 00 ro r #x7005 ENC Default Value Ch1 DINT 32 00000000 ro r #x7006 ENC Operation Command Ch2 UINT 16 0000 ro r #x7007 ENC Period Calculation Ch2 USINT 8 00 ro r #x7009 ENC Latch Command Ch2 USINT 8 00 ro r #x700B ENC Default Value Ch2 DINT 32 00000000 ro r #x700C ENC Output Control UINT 16 0000 ro r #x8000 ENC Characteristic Value DT8000 32 SubIndex 000 0A Logic Choice I01 00 Logic Choice I02 00 Logic Choice I03 00 Logic Choice I11 00 Logic Choice I12 00 Logic Choice I13 00 Count Type Ch1 00 Count Direction Ch1 00 Count Type Ch2 00 Count Direction Ch2 00 #x8001 ENC External IO Function DT8001 112 SubIndex 000 0C Function Choice I01 00 Function Choice I02 00 Function Choice I03 00 Function Choice I11 00 Function Choice I12 00 Function Choice I13 00 Function Choice Q01 00 Function Choice Q02 00 Function Choice Q03 00 Function Choice Q11 00 Function Choice Q12 00 Function Choice Q13 00 #x8002 ENC Max Count Value DT8002 80 SubIndex 000 02 Max Count Value Ch1 FFFFFF7F Max Count Value Ch2 FFFFFF7F #x8003 ENC Min Count Value DT8003 80 SubIndex 000 02 Min Count Value Ch1 00000080 Min Count Value Ch2 00000080 #x800A ENC Window DT800A 48 SubIndex 000 02 Window Ch1 0000 Window Ch2 0000 #x800B ENC Average Times DT800B 48 SubIndex 000 02 Average Times Ch1 0000 Average Times Ch2 0000 #x800C ENC Pulse Input Mode DT800C 32 SubIndex 000 02 Pulse Input Mode Ch1 02 Pulse Input Mode Ch2 02 #x800D ENC External Input Filter DT800D 144 SubIndex 000 08 Pluse Input Filter Ch1 0000 Pluse Input Filter Ch2 0000 Filter I01 0000 Filter I02 0000 Filter I03 0000 Filter I11 0000 Filter I12 0000 Filter I13 0000 #x800E ENC Abnormal Mode DT800E 64 SubIndex 000 06 Abnormal Mode Q01 00 Abnormal Mode Q02 00 Abnormal Mode Q03 00 Abnormal Mode Q11 00 Abnormal Mode Q12 00 Abnormal Mode Q13 00 #x8011 FPGA Version UINT 16 0000 ro #x801A ENC Compare Output Config DT801A 208 SubIndex 000 06 Comparison value of Q01 00000000 Comparison value of Q02 00000000 Comparison value of Q03 00000000 Comparison value of Q11 00000000 Comparison value of Q12 00000000 Comparison value of Q13 00000000 #x801B ENC Comepare output Timer DT801B 112 SubIndex 000 06 Timer of Q01 0000 Timer of Q02 0000 Timer of Q03 0000 Timer of Q11 0000 Timer of Q12 0000 Timer of Q13 0000 #x801C ENC Output Delay DT801C 112 SubIndex 000 06 Delay of Q01 0000 Delay of Q02 0000 Delay of Q03 0000 Delay of Q11 0000 Delay of Q12 0000 Delay of Q13 0000 #x801D ENC Backward Config DT801D 64 SubIndex 000 06 Backward of Q01 00 Backward of Q02 00 Backward of Q03 00 Backward of Q11 00 Backward of Q12 00 Backward of Q13 00 #x8020 ENC Range Compare Enable DT8020 80 SubIndex 000 02 Range Compare Enable of Ch1 00000000 Range Compare Enable of Ch2 00000000 #x8021 ENC Range Compare Config Ch1 Rang1 DT8021 88 SubIndex 000 03 Upper limit of Ch1 Rang1 00000000 Lower limit of Ch1 Rang1 00000000 Output Mode of Ch1 Rang1 00 #x8022 ENC Range Compare Config Ch1 Rang2 DT8022 88 SubIndex 000 03 Upper limit of Ch1 Rang2 00000000 Lower limit of Ch1 Rang2 00000000 Output Mode of Ch1 Rang2 00 #x8023 ENC Range Compare Config Ch1 Rang3 DT8023 88 SubIndex 000 03 Upper limit of Ch1 Rang3 00000000 Lower limit of Ch1 Rang3 00000000 Output Mode of Ch1 Rang3 00 #x8024 ENC Range Compare Config Ch1 Rang4 DT8024 88 SubIndex 000 03 Upper limit of Ch1 Rang4 00000000 Lower limit of Ch1 Rang4 00000000 Output Mode of Ch1 Rang4 00 #x8025 ENC Range Compare Config Ch1 Rang5 DT8025 88 SubIndex 000 03 Upper limit of Ch1 Rang5 00000000 Lower limit of Ch1 Rang5 00000000 Output Mode of Ch1 Rang5 00 #x8026 ENC Range Compare Config Ch1 Rang6 DT8026 88 SubIndex 000 03 Upper limit of Ch1 Rang6 00000000 Lower limit of Ch1 Rang6 00000000 Output Mode of Ch1 Rang6 00 #x8027 ENC Range Compare Config Ch1 Rang7 DT8027 88 SubIndex 000 03 Upper limit of Ch1 Rang7 00000000 Lower limit of Ch1 Rang7 00000000 Output Mode of Ch1 Rang7 00 #x8028 ENC Range Compare Config Ch1 Rang8 DT8028 88 SubIndex 000 03 Upper limit of Ch1 Rang8 00000000 Lower limit of Ch1 Rang8 00000000 Output Mode of Ch1 Rang8 00 #x8029 ENC Range Compare Config Ch1 Rang9 DT8029 88 SubIndex 000 03 Upper limit of Ch1 Rang9 00000000 Lower limit of Ch1 Rang9 00000000 Output Mode of Ch1 Rang9 00 #x802A ENC Range Compare Config Ch1 Rang10 DT802A 88 SubIndex 000 03 Upper limit of Ch1 Rang10 00000000 Lower limit of Ch1 Rang10 00000000 Output Mode of Ch1 Rang10 00 #x802B ENC Range Compare Config Ch1 Rang11 DT802B 88 SubIndex 000 03 Upper limit of Ch1 Rang11 00000000 Lower limit of Ch1 Rang11 00000000 Output Mode of Ch1 Rang11 00 #x802C ENC Range Compare Config Ch1 Rang12 DT802C 88 SubIndex 000 03 Upper limit of Ch1 Rang12 00000000 Lower limit of Ch1 Rang12 00000000 Output Mode of Ch1 Rang12 00 #x802D ENC Range Compare Config Ch1 Rang13 DT802D 88 SubIndex 000 03 Upper limit of Ch1 Rang13 00000000 Lower limit of Ch1 Rang13 00000000 Output Mode of Ch1 Rang13 00 #x802E ENC Range Compare Config Ch1 Rang14 DT802E 88 SubIndex 000 03 Upper limit of Ch1 Rang14 00000000 Lower limit of Ch1 Rang14 00000000 Output Mode of Ch1 Rang14 00 #x802F ENC Range Compare Config Ch1 Rang15 DT802F 88 SubIndex 000 03 Upper limit of Ch1 Rang15 00000000 Lower limit of Ch1 Rang15 00000000 Output Mode of Ch1 Rang15 00 #x8030 ENC Range Compare Config Ch1 Rang16 DT8030 88 SubIndex 000 03 Upper limit of Ch1 Rang16 00000000 Lower limit of Ch1 Rang16 00000000 Output Mode of Ch1 Rang16 00 #x8031 ENC Range Compare Config Ch1 Rang17 DT8031 88 SubIndex 000 03 Upper limit of Ch1 Rang17 00000000 Lower limit of Ch1 Rang17 00000000 Output Mode of Ch1 Rang17 00 #x8032 ENC Range Compare Config Ch1 Rang18 DT8032 88 SubIndex 000 03 Upper limit of Ch1 Rang18 00000000 Lower limit of Ch1 Rang18 00000000 Output Mode of Ch1 Rang18 00 #x8033 ENC Range Compare Config Ch1 Rang19 DT8033 88 SubIndex 000 03 Upper limit of Ch1 Rang19 00000000 Lower limit of Ch1 Rang19 00000000 Output Mode of Ch1 Rang19 00 #x8034 ENC Range Compare Config Ch1 Rang20 DT8034 88 SubIndex 000 03 Upper limit of Ch1 Rang20 00000000 Lower limit of Ch1 Rang20 00000000 Output Mode of Ch1 Rang20 00 #x8035 ENC Range Compare Config Ch1 Rang21 DT8035 88 SubIndex 000 03 Upper limit of Ch1 Rang21 00000000 Lower limit of Ch1 Rang21 00000000 Output Mode of Ch1 Rang21 00 #x8036 ENC Range Compare Config Ch1 Rang22 DT8036 88 SubIndex 000 03 Upper limit of Ch1 Rang22 00000000 Lower limit of Ch1 Rang22 00000000 Output Mode of Ch1 Rang22 00 #x8037 ENC Range Compare Config Ch1 Rang23 DT8037 88 SubIndex 000 03 Upper limit of Ch1 Rang23 00000000 Lower limit of Ch1 Rang23 00000000 Output Mode of Ch1 Rang23 00 #x8038 ENC Range Compare Config Ch1 Rang24 DT8038 88 SubIndex 000 03 Upper limit of Ch1 Rang24 00000000 Lower limit of Ch1 Rang24 00000000 Output Mode of Ch1 Rang24 00 #x8039 ENC Range Compare Config Ch1 Rang25 DT8039 88 SubIndex 000 03 Upper limit of Ch1 Rang25 00000000 Lower limit of Ch1 Rang25 00000000 Output Mode of Ch1 Rang25 00 #x803A ENC Range Compare Config Ch1 Rang26 DT803A 88 SubIndex 000 03 Upper limit of Ch1 Rang26 00000000 Lower limit of Ch1 Rang26 00000000 Output Mode of Ch1 Rang26 00 #x803B ENC Range Compare Config Ch1 Rang27 DT803B 88 SubIndex 000 03 Upper limit of Ch1 Rang27 00000000 Lower limit of Ch1 Rang27 00000000 Output Mode of Ch1 Rang27 00 #x803C ENC Range Compare Config Ch1 Rang28 DT803C 88 SubIndex 000 03 Upper limit of Ch1 Rang28 00000000 Lower limit of Ch1 Rang28 00000000 Output Mode of Ch1 Rang28 00 #x803D ENC Range Compare Config Ch1 Rang29 DT803D 88 SubIndex 000 03 Upper limit of Ch1 Rang29 00000000 Lower limit of Ch1 Rang29 00000000 Output Mode of Ch1 Rang29 00 #x803E ENC Range Compare Config Ch1 Rang30 DT803E 88 SubIndex 000 03 Upper limit of Ch1 Rang30 00000000 Lower limit of Ch1 Rang30 00000000 Output Mode of Ch1 Rang30 00 #x803F ENC Range Compare Config Ch1 Rang31 DT803F 88 SubIndex 000 03 Upper limit of Ch1 Rang31 00000000 Lower limit of Ch1 Rang31 00000000 Output Mode of Ch1 Rang31 00 #x8040 ENC Range Compare Config Ch2 Rang1 DT8040 88 SubIndex 000 03 Upper limit of Ch2 Rang1 00000000 Lower limit of Ch2 Rang1 00000000 Output Mode of Ch2 Rang1 00 #x8041 ENC Range Compare Config Ch2 Rang2 DT8041 88 SubIndex 000 03 Upper limit of Ch2 Rang2 00000000 Lower limit of Ch2 Rang2 00000000 Output Mode of Ch2 Rang2 00 #x8042 ENC Range Compare Config Ch2 Rang3 DT8042 88 SubIndex 000 03 Upper limit of Ch2 Rang3 00000000 Lower limit of Ch2 Rang3 00000000 Output Mode of Ch2 Rang3 00 #x8043 ENC Range Compare Config Ch2 Rang4 DT8043 88 SubIndex 000 03 Upper limit of Ch2 Rang4 00000000 Lower limit of Ch2 Rang4 00000000 Output Mode of Ch2 Rang4 00 #x8044 ENC Range Compare Config Ch2 Rang5 DT8044 88 SubIndex 000 03 Upper limit of Ch2 Rang5 00000000 Lower limit of Ch2 Rang5 00000000 Output Mode of Ch2 Rang5 00 #x8045 ENC Range Compare Config Ch2 Rang6 DT8045 88 SubIndex 000 03 Upper limit of Ch2 Rang6 00000000 Lower limit of Ch2 Rang6 00000000 Output Mode of Ch2 Rang6 00 #x8046 ENC Range Compare Config Ch2 Rang7 DT8046 88 SubIndex 000 03 Upper limit of Ch2 Rang7 00000000 Lower limit of Ch2 Rang7 00000000 Output Mode of Ch2 Rang7 00 #x8047 ENC Range Compare Config Ch2 Rang8 DT8047 88 SubIndex 000 03 Upper limit of Ch2 Rang8 00000000 Lower limit of Ch2 Rang8 00000000 Output Mode of Ch2 Rang8 00 #x8048 ENC Range Compare Config Ch2 Rang9 DT8048 88 SubIndex 000 03 Upper limit of Ch2 Rang9 00000000 Lower limit of Ch2 Rang9 00000000 Output Mode of Ch2 Rang9 00 #x8049 ENC Range Compare Config Ch2 Rang10 DT8049 88 SubIndex 000 03 Upper limit of Ch2 Rang10 00000000 Lower limit of Ch2 Rang10 00000000 Output Mode of Ch2 Rang10 00 #x804A ENC Range Compare Config Ch2 Rang11 DT804A 88 SubIndex 000 03 Upper limit of Ch2 Rang11 00000000 Lower limit of Ch2 Rang11 00000000 Output Mode of Ch2 Rang11 00 #x804B ENC Range Compare Config Ch2 Rang12 DT804B 88 SubIndex 000 03 Upper limit of Ch2 Rang12 00000000 Lower limit of Ch2 Rang12 00000000 Output Mode of Ch2 Rang12 00 #x804C ENC Range Compare Config Ch2 Rang13 DT804C 88 SubIndex 000 03 Upper limit of Ch2 Rang13 00000000 Lower limit of Ch2 Rang13 00000000 Output Mode of Ch2 Rang13 00 #x804D ENC Range Compare Config Ch2 Rang14 DT804D 88 SubIndex 000 03 Upper limit of Ch2 Rang14 00000000 Lower limit of Ch2 Rang14 00000000 Output Mode of Ch2 Rang14 00 #x804E ENC Range Compare Config Ch2 Rang15 DT804E 88 SubIndex 000 03 Upper limit of Ch2 Rang15 00000000 Lower limit of Ch2 Rang15 00000000 Output Mode of Ch2 Rang15 00 #x804F ENC Range Compare Config Ch2 Rang16 DT804F 88 SubIndex 000 03 Upper limit of Ch2 Rang16 00000000 Lower limit of Ch2 Rang16 00000000 Output Mode of Ch2 Rang16 00 #x8050 ENC Range Compare Config Ch2 Rang17 DT8050 88 SubIndex 000 03 Upper limit of Ch2 Rang17 00000000 Lower limit of Ch2 Rang17 00000000 Output Mode of Ch2 Rang17 00 #x8051 ENC Range Compare Config Ch2 Rang18 DT8051 88 SubIndex 000 03 Upper limit of Ch2 Rang18 00000000 Lower limit of Ch2 Rang18 00000000 Output Mode of Ch2 Rang18 00 #x8052 ENC Range Compare Config Ch2 Rang19 DT8052 88 SubIndex 000 03 Upper limit of Ch2 Rang19 00000000 Lower limit of Ch2 Rang19 00000000 Output Mode of Ch2 Rang19 00 #x8053 ENC Range Compare Config Ch2 Rang20 DT8053 88 SubIndex 000 03 Upper limit of Ch2 Rang20 00000000 Lower limit of Ch2 Rang20 00000000 Output Mode of Ch2 Rang20 00 #x8054 ENC Range Compare Config Ch2 Rang21 DT8054 88 SubIndex 000 03 Upper limit of Ch2 Rang21 00000000 Lower limit of Ch2 Rang21 00000000 Output Mode of Ch2 Rang21 00 #x8055 ENC Range Compare Config Ch2 Rang22 DT8055 88 SubIndex 000 03 Upper limit of Ch2 Rang22 00000000 Lower limit of Ch2 Rang22 00000000 Output Mode of Ch2 Rang22 00 #x8056 ENC Range Compare Config Ch2 Rang23 DT8056 88 SubIndex 000 03 Upper limit of Ch2 Rang23 00000000 Lower limit of Ch2 Rang23 00000000 Output Mode of Ch2 Rang23 00 #x8057 ENC Range Compare Config Ch2 Rang24 DT8057 88 SubIndex 000 03 Upper limit of Ch2 Rang24 00000000 Lower limit of Ch2 Rang24 00000000 Output Mode of Ch2 Rang24 00 #x8058 ENC Range Compare Config Ch2 Rang25 DT8058 88 SubIndex 000 03 Upper limit of Ch2 Rang25 00000000 Lower limit of Ch2 Rang25 00000000 Output Mode of Ch2 Rang25 00 #x8059 ENC Range Compare Config Ch2 Rang26 DT8059 88 SubIndex 000 03 Upper limit of Ch2 Rang26 00000000 Lower limit of Ch2 Rang26 00000000 Output Mode of Ch2 Rang26 00 #x805A ENC Range Compare Config Ch2 Rang27 DT805A 88 SubIndex 000 03 Upper limit of Ch2 Rang27 00000000 Lower limit of Ch2 Rang27 00000000 Output Mode of Ch2 Rang27 00 #x805B ENC Range Compare Config Ch2 Rang28 DT805B 88 SubIndex 000 03 Upper limit of Ch2 Rang28 00000000 Lower limit of Ch2 Rang28 00000000 Output Mode of Ch2 Rang28 00 #x805C ENC Range Compare Config Ch2 Rang29 DT805C 88 SubIndex 000 03 Upper limit of Ch2 Rang29 00000000 Lower limit of Ch2 Rang29 00000000 Output Mode of Ch2 Rang29 00 #x805D ENC Range Compare Config Ch2 Rang30 DT805D 88 SubIndex 000 03 Upper limit of Ch2 Rang30 00000000 Lower limit of Ch2 Rang30 00000000 Output Mode of Ch2 Rang30 00 #x805E ENC Range Compare Config Ch2 Rang31 DT805E 88 SubIndex 000 03 Upper limit of Ch2 Rang31 00000000 Lower limit of Ch2 Rang31 00000000 Output Mode of Ch2 Rang31 00 Outputs Inputs MBoxState MBoxOut MBoxIn Outputs Inputs #x1600 ENC CH1 Receive PDO Mapping #x7000 0 16 ENC Operation Command Ch1 UINT #x7001 0 8 ENC Period Calculation Ch1 USINT #x0 0 8 #x7003 0 8 ENC Latch Command Ch1 USINT #x0 0 8 #x7005 0 32 ENC Default Value Ch1 DINT #x1601 ENC CH2 Receive PDO Mapping #x7006 0 16 ENC Operation Command Ch2 UINT #x7007 0 8 ENC Period Calculation Ch2 USINT #x0 0 8 #x7009 0 8 ENC Latch Command Ch2 USINT #x0 0 8 #x700B 0 32 ENC Default Value Ch2 DINT #x1602 ENC Receive PDO Mapping3 #x700C 0 16 ENC Output Control UINT #x1603 ENC CH1 Receive PDO Mapping2 #x8020 1 32 Range Compare Enable of Ch1 UDINT #x8021 1 32 Upper limit of Ch1 Rang1 DINT #x8021 2 32 Lower limit of Ch1 Rang1 DINT #x8022 1 32 Upper limit of Ch1 Rang2 DINT #x8022 2 32 Lower limit of Ch1 Rang2 DINT #x8023 1 32 Upper limit of Ch1 Rang3 DINT #x8023 2 32 Lower limit of Ch1 Rang3 DINT #x8024 1 32 Upper limit of Ch1 Rang4 DINT #x8024 2 32 Lower limit of Ch1 Rang4 DINT #x8025 1 32 Upper limit of Ch1 Rang5 DINT #x8025 2 32 Lower limit of Ch1 Rang5 DINT #x8026 1 32 Upper limit of Ch1 Rang6 DINT #x8026 2 32 Lower limit of Ch1 Rang6 DINT #x1604 ENC CH2 Receive PDO Mapping2 #x8020 2 32 Range Compare Enable of Ch2 UDINT #x8040 1 32 Upper limit of Ch2 Rang1 DINT #x8040 2 32 Lower limit of Ch2 Rang1 DINT #x8041 1 32 Upper limit of Ch2 Rang2 DINT #x8041 2 32 Lower limit of Ch2 Rang2 DINT #x8042 1 32 Upper limit of Ch2 Rang3 DINT #x8042 2 32 Lower limit of Ch2 Rang3 DINT #x8043 1 32 Upper limit of Ch2 Rang4 DINT #x8043 2 32 Lower limit of Ch2 Rang4 DINT #x8044 1 32 Upper limit of Ch2 Rang5 DINT #x8044 2 32 Lower limit of Ch2 Rang5 DINT #x8045 1 32 Upper limit of Ch2 Rang6 DINT #x8045 2 32 Lower limit of Ch2 Rang6 DINT #x1A00 ENC CH1 Transmit PDO Mapping #x6000 0 32 ENC Current Data Ch1 DINT #x6001 0 8 ENC Timer Status Ch1 USINT #x0 0 8 #x6003 0 16 ENC External Input Status Ch1 UINT #x6005 0 8 ENC Period Status Ch1 USINT #x0 0 8 #x6007 0 32 ENC External Latch Data Ch1 DINT #x6008 0 32 ENC Software Latch Data Ch1 DINT #x6009 0 32 ENC Pulse Speed Ch1 DINT #x600A 0 32 ENC Pulse Period Ch1 UDINT #x1A01 ENC CH2 Transmit PDO Mapping #x600B 0 32 ENC Current Data Ch2 DINT #x600C 0 8 ENC Timer Status Ch2 USINT #x0 0 8 #x600E 0 16 ENC External Input Status Ch2 UINT #x6010 0 8 ENC Period Status Ch2 USINT #x0 0 8 #x6012 0 32 ENC External Latch Data Ch2 DINT #x6013 0 32 ENC Software Latch Data Ch2 DINT #x6014 0 32 ENC Pulse Speed Ch2 DINT #x6015 0 32 ENC Pulse Period Ch2 UDINT #x1A02 ENC Transmit PDO Mapping3 #x602B 0 16 ENC Error Status UINT #x602C 0 16 ENC Latch Status UINT #x602D 0 32 ENC Compare Output Status Ch1 UDINT #x602E 0 32 ENC Compare Output Status Ch2 UDINT Synchron SM-Synchron #x0 DC DC-Synchron #x300 0 0 2048 050E804488130000000000800000 0010840084108400 424DD9020000000000003600000028000000100000000E000000010018000000000000000000232E0000232E00000000000000000000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF6BB15ADFEEDBFCFDFB68B058D5E9D174B66470B4608DC3806BB15AE1EFDEFFFFFFF2F8F07BBA6D72B56359A847CAE3C47FBC7174B665A5D09B50A33D8AC17CA5D09BFFFFFFFFFFFF82BD7479B86AAAD3A1D3E8CE52A43FCAE3C49ACA8F81BD74B7D9AF59A847C4E0BEB3A283B5C29D72B563FCFEFCFFFFFFC6E1BF57A644C2DFBBEAF4E8F0F7EEBEDDB799C98E54A541F3F9F25EAA4DF6FAF5E2D7CCC2AA93A3CF9968AF5768AF57D3E8CE75B66661AC4F76B767A0CD9578B86A6EB35F7EBB6FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF